NI AWR Design Environment
TriQuint is an industry leader in advanced, high-performance RF solutions for mobile devices, network infrastructure and defense and aerospace markets. Besides smartphones and tablets, TriQuint products are found in cellular base stations, satellite and optical networks, defense and aerospace solutions, and countless other high-performance communications and radar systems.
The design for this highly broadband PA was done using a non-uniform distributed amplifier (NDPA) topology fully integrated in a monolithic microwave integrated circuit (MMIC) with input and output matched to 50Ω. The design challenge was to balance broadband performance with both high power and excellent power-added efficiency (PAE) and gain. Instead of terminating the drain line with 50Ω impedance, NDPA uses tapered transmission lines. Each transmission line width is chosen to provide the optimum load for each cell. In some cases, the device size in each cell is tapered as well.
Since the target frequency of operation is 30 MHz to 2.7 GHz, the designer chose a 5-cell design for a total device periphery of 2.4 mm to balance the power, gain, bandwidth, and chip size.
The designer used Microwave Office for the circuit simulations, APLAC for the nonlinear harmonic balance engine and AXIEM for all EM simulations.
The large signal measurements revealed excellent results. The output power and PAE of the MMIC are at a constant input power of 27dBm across the frequency (this corresponds to approximately 5 dB into compression).
With 30V on the drain, the MMIC produces greater than 10 W of output power all the way up to 2.5 GHz and 8 W or greater up to 2.7 GHz (power density exceeding 4 W/mm), with PAE of better than 52 percent across the full band. Below 500 MHz, the MMIC achieves near 70 percent PAE. This high PAE is the result of loading the first cell with high impedance.
The built in optimizer in AXIEM helped find the best solution for considering the complex tradeoffs between broadband performance, PAE, gain, and output power. The simplex optimizer converged to a solution even with many variables. AXIEM speed and accuracy, as well as the ease with which the designer was able to set up the de-embedding of internal ports were very helpful. AXIEM enabled whole chip EM simulations that matched the final die measurements very closely.
In addition, the designer found the NI AWR Design Environment user interface to be a highly integrated design platform that was much friendlier and easier to use than other tools. Being able to instantiate AXIEM EM simulations as a sub-circuit in schematics is a very efficient use model that made it easy for the designer to understand what he was actually simulating.
NI AWR Design Environment was the design tool of choice at the designer’s previous employer, which now makes him a happy AWR user for six years. Having used competitive design tools in his engineering classes, he found the learning curve for AWR software at his first job to be very fast—he didn’t even have to rely on the user manuals. Now that the designer is using AWR for real-world design work, he appreciates the highly integrated design platform that makes his job easier. Because all design files (schematics, graphs, EM structures, layout, etc.) is contained in one project file, archiving is very easy. In addition, the many built-in equations/functions make plotting graphs uncomplicated.
In addition, the designer commented that AWR has great support and responds very quickly to any issues (technical or product suggestions).