Multi-Chip Module Design, Verification, and Yield Optimization

Title: Multi-Chip Module Design, Verification, and Yield Optimization
Publication: High Frequency Electronics
Date: January 2017

URL: highfrequencyelectronics.com/images/HFEpdfs/2017/HFE0117_OE.pdf#page=53

Abstract:
As wireless communications systems evolve, smaller devices with better performance are required that incorporate multi-technology- based module designs with different integrated circuit (IC) and printed circuit board (PCB) process technologies. This application note presents a unified design flow that streamlines full module simulation, inclusive of all process technologies, enabling designers to leverage the strengths of specialized electromagnetic (EM) modeling and circuit analysis tools to address various functional block technologies, maintaining all through a single user-interface environment. The application is a dual band, 1.9 GHz (cellular)/ 2.5 GHz WLAN FEM that includes two PAs (GaAs and SiGe), surface-mount BAW filters, and a laminate substrate.