A Modified Three-Level Doherty Amplifier for Next-Generation Communication Systems

This article describes the operation of a modified three-level Doherty amplifier that produces good efficiency over the top 10 dB of operation using devices of equal periphery. Design challenges faced with this type of amplifier are presented and compared against the conventional three-way Doherty architecture. Test results are presented that demonstrate a drain efficiency of greater than 40 percent at 10 dB back-off. The entire RF design, including layout, is implemented in the NI AWR Design Environment. Within this software environment, Microwave Office circuit design software and APLAC harmonic balance are used to simulate, in detail, the large-signal effects of the Doherty amplifier’s operation. The software’s load-pull analysis is used to determine the impact of load impedance on amplifier performance.

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