NI AWR Design Environment
NI AWR Design Environment offers communication IC designers a platform to develop complete small-scale RFICs or RF front-ends for large-scale RFICs from system- to transistor-level design with native or 3rd party schematic/layout entry, fully integrated EM extraction for interconnects and on-chip passive components co-simulated with frequency (harmonic balance) and time (transient) domain circuit analysis.
Design Entry / Extraction / Simulation
Circuit / System / EM Simulation Products
Models and Libraries
Manufacturing and Test